In strained silicon CMOS, carrier transport properties are enhanced by biaxial-tensile strain in a strained silicon layer on relaxed SiGe. Strained silicon MOSFETs have been fabricated on SiGe-on-insulator (SGOI) substrates and have demonstrated a combination of high mobility in strained silicon and the have advantages of SOI structures in sub-100 nm devices. Rim et al., Strained Si for sub-100 nm MOSFETs, 3rd International Conference on SiGe Epitaxy and Heterostructures, March 9-12, Sante Fe, N. Mex., Proceedings p. 125 (2003).
Methods to fabricate SGOI substrates have been reported by groups at MIT and IBM. Transfer of a SiGe layer onto an insulator substrate is achieved using the Smart-Cut™ technique, which incorporates hydrogen implantation and annealing. Bruel et al., Smart-Cut: A New Silicon On Insulator Material Technology Based on Hydrogen Implantation and Wafer Bonding, Jpn. J. Appl. Phys., Vol. 36, 1636 (1997). Additional reports from the MIT group include: Cheng et al., SiGe-on insulator: substrate preparation and MOSFET fabrication for electron mobility evaluation, 2001 IEEE International SOI Conference Proceedings p. 13 (2001); Cheng et al., Relaxed silicon-germanium on insulator substrate by layer transfer, Journal of Electronics Materials, 30, L37 (2001); G. Taraschi et al., Relaxed SiGe on insulator fabricated via wafer bonding and layer transfer: etch-back and Smart-Cut alternatives, Electrochemical Society Proceedings Vol. 2001-3, p. 27 (2001). Reports from the IBM group is similar: Huang et al., Carrier mobility enhancement in strained Si-on-insulator fabricated by wafer bonding, 2001 Symposium on VLSI Technology Digest of Technical Papers, p. 57 (2001), which describe fabrication of a thick layer SiGe which is initially deposited on a silicon substrate, which includes a graded SiGe buffer layer and a relaxed SiGe layer having a constant germanium concentration. Following surface planarization by CMP, hydrogen is implanted into the SiGe layer for purposes of facilitating wafer splitting, and the wafer is bonded to an oxidized silicon substrate. The SiGe-on-oxide is separated from the remainder of the couplet by thermal annealing: splitting occurs along hydrogen-implantation-induced microcracks, which extend parallel to the bonding interface. A technique was also reported to form a SiGe-free strained silicon on insulator substrates. Langdo et al., Preparation of novel-SiGe-free strained Si on insulator substrates, 2002 IEEE International SOI Conference Proceedings, p. 211 (2002). This is very similar to the above technique, except that a thin layer of epitaxial silicon is deposited on SiGe before wafer bonding. After bonding and wafer splitting, the SiGe layer is removed by oxidation and HF etching, enabling the formation of very thin and uniform strained silicon on oxide surface.
Relaxation of strained SiGe layer after being transported onto viscous layer, such as BSG glass, is reported by Moran et al., Kinetics of strain relaxation in semiconductor films grown on borosilicate glass-bonded substrates, Journal of Electronics Materials, 30, 802 (2001); Huang et al., Relaxation of a strained elastic film on a viscous layer, Mat. Res. Soc. Symp. Proc. Vol 695, (2002). The relaxation of SiGe transferred directly to a glass substrate is disclosed pending patent application to Maa et al., Method of making relaxed silicon-germanium on glass via layer transfer, Ser. No. 10/674,369, filed Sep. 29, 2003.
More recently, a method to form strained silicon on insulator from film transfer and hydrogen implantation was disclosed in Maa et al., Strained silicon-on-insulator from film transfer and relaxation by hydrogen implantation, Ser. No. 10/755,615, filed Jan. 12, 2004. Instead of depositing a thick compositionally graded SiGe layer, followed by a fixed composition SiGe layer, an alternative method is disclosed wherein a thinner SiGe layer is deposited, having a thickness of between about 250 nm to about 350 nm, with either fixed or graded germanium composition. The relaxation is achieved by hydrogen implant relaxation. Strained silicon is deposited after CMP of the relaxed SiGe surface. Hydrogen, used to induce splitting, is targeted deep into the silicon substrate region, far below the strained silicon layer. In addition, the substrate silicon-to-SiGe interface helps to retard the propagation of defects and dislocations generated by hydrogen ion implantation in the silicon substrate region. A unique, low-temperature splitting, thinning, polishing and etching process have been adapted to fabricate strained-silicon-on-insulator (SSOI) material, without blister or flaking formation.
All of above-identified references, however, describe use of SiGe, or strained silicon, on oxide, or SiGe on glass, none of which are suitable for the formation of a strained silicon layer on a glass substrate.
Transfer of silicon to glass by hydrogen ion implantation, wafer bonding and splitting is described by Cai et al., Single crystal silicon layer on glass formed by ion cutting, Journal of Applied Physics, 92, 3388, (2002). However, Cai et al. do not use the SiGe layer to facilitate a selective etch, and the surface of silicon, therefore, is rough following splitting, and requires an elaborate process to smooth the roughness, as conventional CMP is difficult to control when the thickness of silicon is in the range of 30 nm to 50 nm. Also, Cai et al do not describe the transfer of strained silicon layer.
Wang et al., Device transfer technology by backside etching for poly-silicon thin-film transistors on glass/plastic substrate, Jpn. J. Appl. Phys., 42, L1044, (2003) describe a method to transfer thin film transistors to glass or plastic substrates by wafer bonding and backside etching. However, this is a complicated process and difficult to control. It is difficult to etch most of the wafer while leaving a uniform layer of silicon on the glass or plastic surface.